1. Field of the Invention
The present invention relates to an image sensor, and more particularly, to an image sensor and a method for fabricating the same, to improve a contact quality between a contact plug and a source diffusion layer by forming an impurity implantation layer, having an impurity selectively implanted thereto, on the source diffusion layer, thereby realizing an optimal image quality in the completed image sensor.
2. Discussion of the Related Art
In recent, as a rapid development of electrical and electronic technologies, various electronic equipments using an image sensor technology, for example, a video camera, a digital camera, a personal computer having a small-sized camera, a mobile phone having a small-sized camera, etc. have been widely studied and researched, and used.
Conventionally, the image sensor is used of a charge coupled device (hereinafter, referred to as a “CCD”). However, the CCD has the disadvantageous characteristics of requirements for a high driving voltage and an additional supporting circuit, and of a high fabrication cost, whereby the CCD is a decreasing trend in use.
Recently, a complementary metal oxide semiconductor (hereinafter, referred to as a “CMOS”) image sensor has great attentions as a substitute for the CCD. The CMOS image sensor is fabricated in a CMOS circuit technology. That is, unlike the related art CCD, the CMOS image sensor has the advantageous characteristics such as a low driving voltage, no requirement for an additional supporting circuit, and a low fabrication cost.
As shown in FIG. 1, the related art CMOS image sensor is formed on an active area of a semiconductor substrate 1 defined by a device isolation layer 3, wherein the CMOS image sensor is comprised of a photodiode 2 for receiving the light from the external and generating optical charges, and a transistor 10 for transferring/discharging the optical charges generated by the photodiode 2 to a signal processing circuit.
In this case, for example, the photodiode 2 is comprised of an N-type impurity diffusion layer 2a and a P-type impurity diffusion layer 2b. The transistor 10 is comprised of a gate insulating layer pattern 11, a gate electrode pattern 12, a spacer 13, source/diffusion layers 16/15, and a salicide layer 17.
At this time, a metal line 25 is formed above the semiconductor substrate 1, to transfer an external electric signal to the transfer 10. Also, an insulating interlayer 26 is formed between the metal line 25 and the semiconductor substrate 1, wherein the insulating interlayer 26 insulates the metal line 25 from the semiconductor substrate 1. In this case, the metal line 25 forms an electric signal connection with the transistor 10 by a contact plug 24 of filling an open hole H.
At this time, for example, the insulating interlayer 26 is comprised of a boron-phosphorous silicate glass layer (hereinafter, referred to as a “BPSG layer”) 22 and an Ozone Tetra Ethyl Ortho Silicate layer (hereinafter, referred to as a “TEOS layer”) 23. In this case, a barrier layer 21 is additionally formed in the interface between the semiconductor substrate 1 and the insulating interlayer 26, to protect the semiconductor substrate 1 from the process stress for formation of the insulating interlayer 26, and to enhance a contact quality between the semiconductor substrate 1 and the insulating interlayer 26.
In the CMOS image sensor according to the related art, the source diffusion layer 16 of the transistor 10, being electrically connected with the photodiode 2, functions as a main node of transferring the optical charges generated in the photodiode 2 to the external, for example, an outlead circuit. Accordingly, the process for enhancing the electric contact quality between the contact plug 24 and the source diffusion layer 16 is very important for improvement of image quality in the CMOS image sensor.
However, the related art CMOS image sensor has difficulties in improving the electric contact quality between the contact plug 24 and the source diffusion layer 16.
For example, since the open hole H functions as a main channel of the contact plug 24, the open hole is formed in a large size, to increase a contact area between the contact plug 24 and the source diffusion layer 16, thereby improving the contact quality between the contact plug 24 and the source diffusion layer 16. Under the substantial fabrication process, it is very difficult to maintain a constant thickness of the insulating interlayer 26, and to form the uniform open hole H in the insulating interlayer 26 from an upper side to a lower side. As a result, it has the limitation to the increase of the contact area between the contact plug 24 and the source diffusion layer 16, thereby causing the deterioration of the contact quality between the contact plug 24 and the source diffusion layer 16.
Also, in case of the related art CMOS image sensor, it is possible to increase the impurity concentration of the source diffusion layer 16 by increasing the amount of impurity implanted to the source diffusion layer 16, thereby inducing the improvement of the contact quality between the contact plug 24 and the source diffusion layer 16. In this case, since an impact is undesirably applied to the surface of the semiconductor substrate 1 by highly implanting the impurity, so that the completed source diffusion layer 16 undesirably has a current leakage. Thus, it has the limitation to the increase in amount of impurity implanted to the source diffusion layer 16, thereby causing the deterioration of the electric contact quality between the contact plug 24 and the source diffusion layer 16.
Like the aforementioned gate electrode pattern 12 and the drain diffusion layer 15, the salicide layer 17 may be additionally formed on the surface of the source diffusion layer 16, to realize the contact quality between the contact plug 24 and the source diffusion layer 16. In this case, as an undesirable impact is applied to the photodiode 2 of the semiconductor substrate 1 due to the formation of the salicide layer 17, whereby the performance of the completed photodiode 2 is largely lowered. In this respect, it is impossible to improve the contact quality between the contact plug 24 and the source diffusion layer 16 only by forming the salicide layer on the source diffusion layer 16 without the additional process.